nesdev.org

Posted: **Mon Dec 13, 2010 7:39 pm**

I am aware of a few CPU quirks, like the dummy write on INC. Is there a list somewhere of the other quirks, or can one of you walking NES information archives whip one up? Much appreciated! ;D

Posted: **Mon Dec 13, 2010 9:13 pm**

There's the error on wrap for the JMP Indirect instruction, you ask to do an indirect jmp at ($1FF) and it reads the 16-bit jump address from $1FF and $100 instead of $1FF and $200.

Then there's the extra cycle for when some instructions cross pages when adding X or Y.

Then there's the zeropage instructions which wrap back to the zeropage when you add a X to them instead of advancing to the $100 page.

Posted: **Mon Dec 13, 2010 9:26 pm**

Those are all good quirks, what about other dummy reads/writes? I'm trying to make my CPU not require a timing table, instead just adding cycles for read/write (and page boundary crossing where appropriate).

Posted: **Mon Dec 13, 2010 9:28 pm**

I think there are dummy reads for the wrong offset when there's a penalty cycle. Not 100% sure here, but I think when instructions like LDA xxxx,X cross to the next page, it will read from the incorrect page, then read from the correct page.
Wonder if this could be used to read both PPUSTAT and PPUDATA from one instruction?

Posted: **Mon Dec 13, 2010 9:30 pm**

Alright, and am I correct that INC does a dummy write? Say you do INC $AA, it'll read the value at $AA, then write that value to $AA, increase then write to $AA again?

If so, does DEC do the same thing?

Posted: **Mon Dec 13, 2010 9:34 pm**

I think all the "read-modify-write" instructions (including shift instructions) do that.

What's bad is that some games want to see the dummy write, and not the real write afterwards. Good ol MMC1 games and INC xxxx to write FF as the dummy value.

Posted: **Mon Dec 13, 2010 9:37 pm**

I couldn't find it right now, but I'm pretty sure someone in this board posted a link to a document that lists everything each instruction does every cycle, so it should contain all the dummy reads/writes. I'll update here if I can find it.

Posted: **Mon Dec 13, 2010 9:39 pm**

It seems that this is a good idea then! There are a few things still confusing me, take for example LDA (xx,X) (Assume all reads/writes consume 1 CPU cycle):

Read Instruction (PC)
Read Zero Page Address (PC + 1)
Add X, with wrapping
Read Low Byte ($00)
Read High Byte ($20)
Read Data ($2000)

This sequence totals 5 cycles, but the actual instruction requires 6.. Where is the missing cycle coming from?

EDIT: That would be great tokumaru!

Posted: **Mon Dec 13, 2010 9:57 pm**

I think this is the document. The last third of the document appears to detail several instructions.

Posted: **Mon Dec 13, 2010 10:02 pm**

The 6502.org forums have details about instruction execute and the PLA (programmable logic array, not to be confused with 'pull accumulator').

The following links mainly discuss how the 6502 handles to so called "illegal instructions". However, they also contain clues about what the 6502 does on each clock cycle while executing an instruction.

http://forum.6502.org/viewtopic.php?t=1406
http://www.pagetable.com/?p=39

Once this data is gathered, I think that it would make an excellent addition to the wiki.

EDIT:
http://www.geocities.jp/team_zero_three/FC/index_e.html
(search for first use of the word "dummy")

http://nesdev.com/bbs/viewtopic.php?p=11288#11288

EDIT #2: Found this on the geocities.jp page:

Although the FC/NES 6502 is not completely same as the general NMOS6502 chip, it has been verified that the FC/NES 6502 also has undocumented instructions and executes RMWW for RMW instructions.

Posted: **Mon Dec 13, 2010 10:22 pm**

It would be so counter-intuitive, but how awesome would it be to do a cycle by cycle CPU emulation? Like LDA:

Code: Select all

int LDA(int cycles)
{
    static int ldaCycles=0;

    while (cycles > 0)
    {
        switch (ldaCycles)
        {
            case 0: // fetch address?
            ...
            case x: return (cycles - ldaCycles);
        }
    }

    return 0;
}

It would be a huge pain in the ass, but I think it would be neato!

Posted: **Tue Dec 14, 2010 7:57 am**

I seem to remember Nintendulator emulates cycle by cycle like that.

Posted: **Tue Dec 14, 2010 6:33 pm**

tepples wrote:I seem to remember Nintendulator emulates cycle by cycle like that.

I didn't come to that conclusion looking at the source for v0.975.

Posted: **Tue Dec 14, 2010 7:22 pm**

Nestopia emulates the instructions cycle by cycle.

Posted: **Wed Dec 15, 2010 4:58 am**

NESICIDE wrote:
tepples wrote:I seem to remember Nintendulator emulates cycle by cycle like that.
I didn't come to that conclusion looking at the source for v0.975.

I initially thought that too, but actually it does emulate cycle by cycle. Check the functions which handle different addressing modes (AM_xxx), every MemGet()/MemSet() increases cycle count.

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CPU Quirks

CPU Quirks