nesdev.org

I have got good figures from several chinese places through a friend. I am working on a rather big project which PCB is 170 x 245mm and 4 layers and it costs me 260eur for 10 boards

Remember that NES carts are not the normal PCB thickness. They are 1.2mm which many places will not do. You can jam a 1.5mm board into the cart slot but the connector won't last long. I haven't done 4 layer stuff with them but get all my other boards from MyroPCB.

I order from MyroPCB also, been using them since 2005 and they've always been good.

Thanks for the tips. Does myro have some sort of membership fee or somthing? I seem to remember you saying something to me about that once ago Memblers. Maybe it was for assembly or something though because I can't find anything like that on their site.

EDIT: has anyone ever tried to run the NES off of 3.3v before? I'm guessing most things MIGHT work but I'm figuring the video filtering and such might be gunked up. I've got a breakout board for my CPLD but no buffers set up until I get the PCB. I think my FCmobile runs off 3.3v though so I could probably just do some prelim testing with that.

Well I was pretty impressed with running the NES at a lowered voltage. I was kind of right about my predictions of the video. Turned NES (REV-07 PCB) ran pretty stable at 3.3v and even down to around 3.15-3.2v below that it would crash. The video looked pretty good, it was just darkened and the sound was a little quieter which makes sense.

For reference if anyone is curious I had the CIC defeated and was running on of Memblers' repro carts with more modern memories on board because I did't want the cart to be the cause of not operating at lowered voltage. I was also running a UNROM mapper (california raisins)

My FCmobile looks like it's pretty close to my max input of my CPLD (3.75v) My scope showed some signals ghosting above from time to time but probably won't cause much damage.

Wwll I couldn't get it made for anything less than $400 looking for only a couple boards... So I finally got some sense and broke down and routed thing by hand. I Had to completely reassign pins to all the memories and CPLD as I drew every last signal by hand. I was able to drastically optimize it by doing that and took it from a 4layer board to 2 layers. with twice the design tolerances and less than half the vias...

Auto routing madness on 4 layers:


Hand routed on 2 layers:
[EDIT: re-attached below]

What it'll kind look like now:
[EDIT: re-attached below]

So tomorrow I'll be ordering the first boards. I can get em for less than $40 each in single quantities. Some autoquoting showed that I should be able to get unassembled boards for under $10 for quantities of 25. So that was nice to see.

There's around $50-60 worth of parts onboard, $8-10 for case and CIC. So looks like it'll still be reasonable to obtain for $100 or less with assembly figured in.

I also got my hands on a breakout board with the mach XO2 cpld on it. I asked the guys at Lattice and they hooked me up for free sponsoring the school project.

Had to do a quick video demo for school so there's a video here:
http://www.youtube.com/watch?v=MuHV_ATm ... GPKN8ZGBmt

Your 2-layer version there is looking much better than the other one.

BTW, I'm not sure what CAD software you're using, but if you can export/import Specctra files, there is a really good autorouter here:
http://www.freerouting.net/
I actually use it even for doing manual routing, because I use Proteus which doesn't have the "push and shove" feature (which is really handy for making dense boards). With it's autorouter you might have to leave it optimizing for 5 days straight depending on your board complexity, but it gives a pretty good result.

Thanks for those resources Memblers.

Yeah I used DesignSpark for the board, it's not my favorite but it's what I've got the most experience with and haven't decided to devote more time to learning another tool and my component libraries. It doesn't look like it supports Specctra export/import, looks like people have been requesting it though.

Even still I don't think any computer tool could have come close to optimizing like I could. The main reason being I had to assign memory address and data lines as I routed the signals by hand interweaving them between pins and such as they best fit. I literally created the netlist for most parts as I drew it out. I had to ignore the memory pinout from the datasheets. No D0-7 or A0-18, just D's and A's... And obviously the same with the CPLD with the general IOs.

That tool can't optimize by reassigning the netlist like I could right? If so that would be AWESOME. Even if it would have taken 5 days on it's own, it would have been better than the 5 days I spent doing everything by HAND... At least I've got an intimate relationship with every trace on the board now

I haven't checked out that Proteus yet, but if you and Farid are having good results with it I might check that one out if/when I decided to toss DesignSpark in the trash.

That boardl ooks very awesome

It makes me feel like such a masochist for doing stuff like this without any netlists and autoroute and manually created components :
http://www.fileden.com/files/2008/4/21/ ... arDone.png

I'm doing same kind of "don't care about A and D order for sake of easy routing" on all memory chips whenever possible

TmEE wrote:It makes me feel like such a masochist for doing stuff like this without any netlists and autoroute and manually created components :
http://www.fileden.com/files/2008/4/21/ ... arDone.png

Wowzers, NO auto-tools huh? I've seen your board before but knowing that especially after my simple project makes yours much more impressive. What are you using for software?

I kind of know what you're saying, and would have to agree that masochism is a fitting word. Once you get so much done by hand you start to lose interest in the auto-tools and want the gratification of doing it ALL by hand regardless of the pain/time involved...

I used Minimal Board Editor to create it. I think I am the biggest user of it, and I have made quite a few feature requests which have been added now too
http://www.suigyodo.com/online/e/
Only real problem with it is lack of component library, I had to make everything myself (which I actually enjoy doing).

TmEE wrote:I'm doing same kind of "don't care about A and D order for sake of easy routing" on all memory chips whenever possible

That might make it slightly harder to program a flash chip when the bits assorted with the write commands get switched around or (worse) when it makes individual banks non-contiguous. I think that's why the GBA Movie Player, for example, has such a strange write sequence to reprogram the flash. (ObNES: Dwedit made a version of PocketNES that installs to unused parts of the GBAMP's flash.)

Actually with Proteus there are some features like that, but I've never tried to use them (so I'm not sure if it's 100% what we'd want). One is gate-swap, which is more typically used for swapping different gates in a 74HC00 for example. When creating components there's a "swappable pins" section that I never filled out when making stuff. The other feature is back-annotation, where somehow you can change stuff on the PCB and it can automatically change the schematic to match. I've not tried either of those, though I really should. Currently in that situation I just use the 'ratsnest' view and change the pins on the schematic manually until it looks like the signals don't cross as much.

Unfortunately I don't think that autorouter supports that kind of stuff. But I donno really, I suppose the 'swappable pins' theoretically could be part of the Specctra format. But as usual with routing and autorouting alike, the main part of good routing results lies in the component placement (and pin use).

The names certainly suggest what you wrote, if reality is same is another question. I only tried Protel briefly and decided I liked something else more. Eventually I settled with MBE because it did all I wanted in easy and painless way.

tepples wrote:That might make it slightly harder to program a flash chip when the bits assorted with the write commands get switched around or (worse) when it makes individual banks non-contiguous. I think that's why the GBA Movie Player, for example, has such a strange write sequence to reprogram the flash. (ObNES: Dwedit made a version of PocketNES that installs to unused parts of the GBAMP's flash.)

I have actually kept flash pins as original for the very reason, luckily for me things have matched up with not so much headache when keeping original signal order. I could only swap individual bits in the 4 bytes anyway but not across the bytes, unless I want some extremely messy firmware update routine, at least for boot flashes anyway...

tepples wrote:

TmEE wrote:I'm doing same kind of "don't care about A and D order for sake of easy routing" on all memory chips whenever possible

That might make it slightly harder to program a flash chip when the bits assorted with the write commands get switched around or (worse) when it makes individual banks non-contiguous. I think that's why the GBA Movie Player, for example, has such a strange write sequence to reprogram the flash. (ObNES: Dwedit made a version of PocketNES that installs to unused parts of the GBAMP's flash.)

Effectively the Flash was the only part that I wasn't able to swap pin assignments around with because of what you're saying. Since it was the only one it didn't really effect my routing. I just let the flash be the deciding factor on which net was which. The SRAM and CPLD simply followed suit.

Memblers wrote:The other feature is back-annotation, where somehow you can change stuff on the PCB and it can automatically change the schematic to match. I've not tried either of those, though I really should. Currently in that situation I just use the 'ratsnest' view and change the pins on the schematic manually until it looks like the signals don't cross as much.

Yeah I had hopes that I could use the back annotation feature of DesignSpark but it turned out it was ONLY for remaming nets and parts. It would NOT actually revise the netlist so I had to go back and back annotate the nets myself. Hopefully Proteus doesn't have that issue.

I did do the 'ratsnest' method and the memories seemed to line up pretty well with the pinout assigned with the data sheet. But it still epically failed when it came to the autoroute. It probably would have done better if I had through-hole components or smaller design tolerances to give some breathing room. Even still I don't think it would have taken me from 4 to 2 layers though.