Mapper recommandation chart

Bregalad · Post by **Bregalad** » Mon Feb 20, 2012 3:43 pm

The discussion in that other thread made me made this chart, so anyone can easily figure the "minimal" mapper requirement.
Only the Nintendo mappers are included, because if I wanted to include all 3rd party mappers it would be way too complex.

The chart :

a) Need to switch large page of tilesets rapidly ? (need for CHR-ROM)
yes -> b)
no -> c)

b) Need to do pixel effects on individual tiles ? (need for CHR-RAM)
yes -> Use mapper 119 (MMC3, TQROM)
no -> d)

c) Need to do pixel effects on individual tiles ? (need for CHR-RAM)
yes -> g)
no -> j)

d) You'll use CHR-ROM. Need 512kb CHR-ROM ?
yes -> Use MMC5
no -> e)

e) Need more than 8kb WRAM ?
yes -> Use MMC5
no -> f)

f) Need 512kb PRG-ROM or 256kb CHR-ROM ?
yes -> Use MMC3
no -> g)

g) Need scanline counter ?
yes -> Use MMC3
no -> h)

h) Need WRAM ?
yes -> Use MMC1 (or MMC4)
no -> i)

i) Need to change mirroring during the game ?
yes -> Use MMC1 (or MMC2)
no -> k)

j) it doesn't matter if you use CHR-ROM or CHR-RAM.
Total amount of data >512kb ?
yes -> Use MMC5
no -> g)

k) Use discrete logic mapper.
Total size <=40kb ?
yes -> use no mapper
no -> use another discrete logic mapper (AxROM, CxROM, BxROM, GxROM or UxROM)

Dwedit · Post by **Dwedit** » Mon Feb 20, 2012 3:52 pm

What about 32k of CHR-RAM?

3gengames · Post by **3gengames** » Mon Feb 20, 2012 3:56 pm

How about MMC3 with CHR-RAM when only boards that have the pins are early SMB2 boards?

Post by **tepples** » Mon Feb 20, 2012 4:54 pm

Dwedit: Does any Nintendo board even support big CHR RAM? I can't think of any, apart from CPROM. Otherwise, any mapper supporting both CHR ROM and CHR RAM would probably work.

3gengames: That and Mega Man 4, Mega Man 6, and Ninja Crusaders. I think this article assumes that bunnyboy might start offering a ReproPak MMC3.

Post by **lidnariq** » Mon Feb 20, 2012 5:42 pm

tepples wrote:Does any Nintendo board even support big CHR RAM? I can't think of any, apart from CPROM.

This is pedantic, but I've been pouring over the wiki too much lately, and mapper 96 supports 32kB in a strange layout.

Post by **tepples** » Mon Feb 20, 2012 7:12 pm

And to get double pedantic, the game using that mapper isn't on a Nintendo board. But it looks almost as if CPROM and MMC2 had a baby: reading from PPU $2000-$2FFF selects a CHR RAM subpage from bits PA10 and PA11.

Shiru · Post by **Shiru** » Mon Feb 20, 2012 8:10 pm

I would like to have a mapper chart in form of a single table, i.e. one row - one mapper, and all the capabilities are listed (size of banks, number of banks, mirroring, etc).

Post by **tepples** » Mon Feb 20, 2012 9:00 pm

Something like this table?

MottZilla · Post by **MottZilla** » Mon Feb 20, 2012 10:35 pm

I wouldn't really recommend producing any game using the MMC2 or MMC4 today unless you had a really good reason for using its CHR ability.

infiniteneslives · Post by **infiniteneslives** » Mon Feb 20, 2012 11:27 pm

I realize this is meant to be Nintendo boards/mappers/concepts

only but...

MottZilla wrote:I wouldn't really recommend producing any game using the MMC2 or MMC4 today unless you had a really good reason for using its CHR ability.

Keep in mind that, Memblers' 8T-ROM is has is similar to them with his PPU 'interupt.' Although I don't think it's WRAM that gets you to MMC4 with Bregalad's chart.

dwedit wrote: What about 32k of CHR-RAM?

His board also has 32KB CHR-RAM

http://nesdev.com/bbs/viewtopic.php?t=8235

Shiru · Post by **Shiru** » Mon Feb 20, 2012 11:57 pm

tepples wrote:Something like this table?

Yes, thanks.

Bregalad · Post by **Bregalad** » Tue Feb 21, 2012 5:24 am

I made a small fix since yesterday.

I excluded non-Nintendo mappers (as I said in my 1st post), and it's true I excluded CPROM too because it's very specific. Switching CHR-RAM pages is interesting but doing it while being limited to 32kb PRG-ROM is not.

Also I don't really recommend MMC2/4, I just included them so I could include (almost) all Nintendo mappers in the chart. I just add them at an option when I recommend the MMC1.

PS : Tepples, your table is great and is a great addition to the wiki.

Karatorian · Post by **Karatorian** » Wed Feb 22, 2012 1:28 am

Hey, you forgot a couple of questions, like "Do you want to make carts?" and "Is the MMC1 register write protocol brain-damaged?"

But seriously, this is a very well thought answer to an FAQ that's not amendable to a simple one size fits all reply. Inspired by this, I turned it into a flow chart.

PFD (US Legal)
SVG Source

Please proofread this. I think it's a correct adaptation, but it'd be nice to have someone else look it over.

Dwedit · Post by **Dwedit** » Wed Feb 22, 2012 1:52 am

Fix your links, they all go to the PNG file. And the last question is backwards.

Bregalad · Post by **Bregalad** » Wed Feb 22, 2012 5:20 am

Do you want to make carts?

If yes, then use a discrete logic mapper as you'll avoid the pain that programming CPLDs in verilog is...

Is the MMC1 register write protocol brain-damaged?

It is not so brain damaged in the sense that this allowed to connect only 2 data lines (D0, D7) to the chip. If you were to have a standard parallel write procedure, they'd have to connect 5 data lines, so 3 additional pins, the chip would have to be 28 pin (27 pins chips doesn't exist obviously).