tepples wrote:
How exactly does bit 0 of registers 0 and 1 of RAMBO-1 behave with bit 0 in both 2 KiB and 1 KiB modes? Should I write a test of basic PRG and CHR bankswitching behavior of MIMIC-1 (#206), MMC3 (#4), and RAMBO-1 (#64), and have someone with a modded cart run it?
I started on my RAMBO-1 verilog implementation last week, but haven't finished coding it up and testing out in hardware yet. So all I know for sure is that you have a good question. I'm sure someone knows the answer though, shouldn't emulators be able to tell you if the answer in the documentation is ambiguous? Otherwise they'd have CHR bankswitching all goofed up when playing every game pretty much.
I assume that the Reg0 and Reg1 of the RAMBO-1 aren't shifted back and forth when changing CHR modes. Meaning that it would be similar to MMC3, which I realized ignores bit 0. Except the RAMBO-1 doesn't ignore bit 0 when all CHR registers are in use (obviously uses all 8 bits). Doing anything else would require adding gates just to make things more complicated...
I Don't have a logical approach to MIMIC since they don't have $80 mode like you've pointed out. But I assume it follows suit with the MMC3. Hardware wise it's more sensible to line everything up where D7 always is directed to A17 etc.
I've got RAMBO and MIMIC boards, but no doubles that I'd be willing to hack up for a simple question like this. If you had the program running on RAM to do a cart swap I could test it in a jiffy though. EDIT: but I've got some easier ways to find out using hardware tools before we mess around with that.