Visual 2C02

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Quietust
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Visual 2C02

Post by Quietust »

In August 2011, an RP2C02G was depackaged and photographed. Within 3 days, I had traced the metal layer, 2 days later, I recorded the location of every via I could see.

14 months later, the chip was finally delayered; polysilicon was traced in about 5 days, diffusion after another 4 days, and buried contacts 1 day later.

After about a day spent processing the layer images, fixing mistakes, and various tweaking, I present to you:

The Visual 2C02

The simulator currently has an old test program I wrote for it (which performs a sprite DMA and then tries to enable rendering), but it doesn't really accomplish much because the PPU takes at least a complete frame to come out of reset and actually start accepting writes to various registers (as observed and documented here).

Names have been assigned to a preliminary set of nodes and buses:
  • all of the external pins (and their corresponding internal signals)
  • the pixel counter (hpos*)
  • the scanline counter (vpos*)
  • the SPR-RAM address (spr_ptr*)
  • the I/O register signals (w2000, w2001, w2003, w2004, w2005a, w2005b, w2006a, w2006b, w2007, r2002, r2004, r2007)
  • the VRAM address register (vramaddr_t* and vramaddr_v*) plus fine X scroll (finex*)
  • the writable bits of $2000 (addr_inc, spr_pat, bkg_pat, spr_size, slave_mode, enable_nmi)
  • the writable bits of $2001 (pal_mono, bkg_clip, spr_clip, bkg_enable, spr_enable, emph*)
  • the readable bits of $2002 (spr0_hit, spr_overflow, vbl_flag)
  • the $2007 read buffer (inbuf*)
If you find any other interesting nodes, let me know and I will add them when I get a chance.
Quietust, QMT Productions
P.S. If you don't get this note, let me know and I'll write you another.
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infiniteneslives
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Re: Visual 2C02

Post by infiniteneslives »

Big day for the nesdev community indeed.

Congrats on the accomplishment, and many thanks for making this tool/wealth of knowledge available to us all.
If you're gonna play the Game Boy, you gotta learn to play it right. -Kenny Rogers
3gengames
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Re: Visual 2C02

Post by 3gengames »

EPIC! Might mess around with it one day just to really see what's going on. :D
ooPo
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Re: Visual 2C02

Post by ooPo »

Well done, this will be fun to study.
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tokumaru
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Re: Visual 2C02

Post by tokumaru »

Very very cool! Will have to play with this later. Thanks Quietust!
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mikejmoffitt
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Re: Visual 2C02

Post by mikejmoffitt »

With the RP2C02 fairly disassembled at this point, would reproductions, featuring RGB output (with the changes one would expect) be feasible?
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Bregalad
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Re: Visual 2C02

Post by Bregalad »

This sure looks very interesting, but how am I supposed to use this ?

@mikejomffit : The NES PPU does not have RGB output, and it was never meant to have any. The output signal is composite by the very nature of how the NES palette works, and it can't be otherwise.
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tokumaru
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Re: Visual 2C02

Post by tokumaru »

Bregalad wrote:how am I supposed to use this ?
I'm having some trouble understanding how this works too... how am I supposed to control the PPU?
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Quietust
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Re: Visual 2C02

Post by Quietust »

The really tall table on the far right is the test program. Each column has a particular meaning:
"-" - delete this instruction.
"*" - run this instruction next (the current instruction will have this highlighted)
"+" - insert a new instruction after this one.
"?" - instruction type: "R" reads, "W" writes, and "-" delays.
"#" - instruction address (i.e. $2000-$2007); for delays, this is ignored.
"##" - instruction data. For delays, this is the number of cycles to wait; the value will be filled in when the instruction finishes.

I've just replaced the sample program with a much shorter one (replaced the full sprite DMA with just setting the first and last sprites).

If you can think of a better interface for this, I welcome your suggestions (or, better yet, actual code) - the current interface was the initial prototype I threw together so it had an interface in the first place.

There's also the issue that, even on a very fast computer, it will take over an hour and a half of simulation just for the chip to get out of reset (with animation and tracing both turned off, it ran at about 60Hz out of the standard 21.477272MHz). It might be possible to run the simulator for that long, save a snapshot of it just before the important reset logic finishes, then restore to that snapshot on reset, but I'll need to do some more research into the inner workings of ChipSim before I can manage that.
Quietust, QMT Productions
P.S. If you don't get this note, let me know and I'll write you another.
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tokumaru
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Re: Visual 2C02

Post by tokumaru »

Thanks for the instructions.
Quietust wrote:it will take over an hour and a half of simulation just for the chip to get out of reset
Wow, that's insane.
save a snapshot of it just before the important reset logic finishes
I was just about to suggest that.

I wonder what exactly the PPU does during reset though...
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infiniteneslives
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Re: Visual 2C02

Post by infiniteneslives »

tokumaru wrote:
Quietust wrote:it will take over an hour and a half of simulation just for the chip to get out of reset
Wow, that's insane.
That is pretty crazy, I guess that's a good reminder to wait the 3 frames to start writing to the PPU ;)
If you're gonna play the Game Boy, you gotta learn to play it right. -Kenny Rogers
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Dwedit
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Re: Visual 2C02

Post by Dwedit »

One of the things we really wanted to investigate was the OAM corruption bug that happens when you disable rendering late when sprites are near, even when you are uploading a new set of sprites before the next time rendering is turned back on.

How is the PPU memory (graphics and nametables) handled now? Is it all RAM now? Is it nonexistent? Any way to get CHR-ROM from a file in there?
How about making some composite video square waves, and turning them into RGB pixels so you can see its output?
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org
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Re: Visual 2C02

Post by org »

Congratulations Quietust :D Being watching progress almost in real-time in skype chat )

I'm using another approach, to understand PPU functionality:

Image

This is (still unfinished) transistor-level schematics of top-left piece of PPU (most interesting part).
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tokumaru
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Re: Visual 2C02

Post by tokumaru »

org wrote:This is (still unfinished) transistor-level schematics of top-left piece of PPU (most interesting part).
Ah, this is pretty interesting too.
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kyuusaku
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Re: Visual 2C02

Post by kyuusaku »

I rearranged the data into a better format for further processing:

[net name string, has pull-up boolean, attached gates list, attached sources list, attached drains list]

Edit: use updated format on page 3
Last edited by kyuusaku on Thu Nov 01, 2012 10:43 pm, edited 1 time in total.
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